It was filed before we start work in open.
Anyway, currently it is not the problem since new x86 cpus fuse
test+jcc instructions into one so there is no performance loss,
only code size is affected.

To implement 5044093 requires a lot of work so, most like,
we will not do it soon.

Vladimir

Ulf Zibis wrote:
Much thanks, but not visible on the web. :-(
http://bugs.sun.com/bugdatabase/view_bug.do?bug_idP44093

-Ulf


Am 19.03.2010 19:43, schrieb Vladimir Kozlov:
RFE: 5044093

Vladimir

Ulf Zibis wrote:
If I understand the Intel manual right, the zero flag is already set
from the SHR instruction, so newly testing on 0 by TEST instruction
seems superfluous.

Am I wrong ?


0x00b88942: shr $0x10,%eax ;*iushr
; -
java.lang.Character::isBMPCodePoint at 3 (line 2737)
; -
java.lang.Character::charCount at 1 (line 2907)
; -
java.lang.Character::charCount at 26 (line 2946)
0x00b88945: test %eax,%eax
0x00b88947: je 0x00b88973 ;*ifeq
; -
java.lang.Character::charCount at 4 (line 2907)
; -
java.lang.Character::charCount at 26 (line 2946)


-Ulf

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